IndiumV3, Chine, Analysis, bibRecord, 000053

Unique UV-Erasable In-Ga-Zn-O TFT Memory With Self-Assembled Pt Nanocrystals

Identifieur interne : 000053 ( Chine/Analysis ); précédent : 000052; suivant : 000054

Unique UV-Erasable In-Ga-Zn-O TFT Memory With Self-Assembled Pt Nanocrystals

Auteurs : RBID : Pascal:13-0261432

Descripteurs français

Pascal (Inist)
- Transistor couche mince, Autoassemblage, Matériau amorphe, Grille transistor, Seuil tension, Mobilité électron, Température ambiante, Haute performance, Mémoire non volatile, Zinc, Nanocristal, Oxyde d'indium, Oxyde de gallium, Oxyde de zinc, Alumine, Multicouche, Circuit intégré, 8107B, Al2O3.
Wicri :
- concept : Matériau amorphe, Zinc.

English descriptors

KwdEn :
- Alumina, Amorphous material, Electron mobility, Gallium oxide, High performance, Indium oxide, Integrated circuit, Multiple layer, Nanocrystal, Non volatile memory, Room temperature, Self assembly, Thin film transistor, Transistor gate, Voltage threshold, Zinc, Zinc oxide.

Abstract

Semiconducting amorphous indium-gallium-zinc oxide (a-IGZO) films are integrated with an Al₂O₃/Pt-nanocrystals/Al₂O₃ gate-stack to form UV-erasable thin-film transistor (TFT) memory. The threshold voltage (V_th), subthreshold swing, I_ON/I_OFF ratio, and effective electron mobility of the fabricated devices are 2.1 V, 0.39 V/decade, ∼10⁶, and 8.4 cm²/V.s, respectively. A positive V_th shift of 2.25 V is achieved after 1-ms programming at 10 V, whereas a negative V_th shift as large as 3.48 V is attained after 5-s UV erasing. In addition, a 10-year memory window of 2.56 V is extrapolated at room temperature. This high-performance a-IGZO TFT memory is suitable for optical touch-panel applications.

Links toward previous steps (curation, corpus...)

to stream Main, to step Corpus: 000946
to stream Main, to step Repository: 000248
to stream Chine, to step Extraction: 000053

Links to Exploration step

Pascal:13-0261432

Le document en format XML

<record><TEI><teiHeader><fileDesc><titleStmt><title xml:lang="en" level="a">Unique UV-Erasable In-Ga-Zn-O TFT Memory With Self-Assembled Pt Nanocrystals</title>
<author><name sortKey="Cui, Xing Mei" uniqKey="Cui X">Xing-Mei Cui</name>
<affiliation wicri:level="1"><inist:fA14 i1="01"><s1>State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University</s1>
<s2>Shanghai 200433</s2>
<s3>CHN</s3>
<sZ>1 aut.</sZ>
<sZ>2 aut.</sZ>
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<country>République populaire de Chine</country>
<wicri:noRegion>Shanghai 200433</wicri:noRegion>
</affiliation>
</author>
<author><name>SUN CHEN</name>
<affiliation wicri:level="1"><inist:fA14 i1="01"><s1>State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University</s1>
<s2>Shanghai 200433</s2>
<s3>CHN</s3>
<sZ>1 aut.</sZ>
<sZ>2 aut.</sZ>
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<country>République populaire de Chine</country>
<wicri:noRegion>Shanghai 200433</wicri:noRegion>
</affiliation>
</author>
<author><name sortKey="Ding, Shi Jin" uniqKey="Ding S">Shi-Jin Ding</name>
<affiliation wicri:level="1"><inist:fA14 i1="01"><s1>State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University</s1>
<s2>Shanghai 200433</s2>
<s3>CHN</s3>
<sZ>1 aut.</sZ>
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<author><name sortKey="Sun, Qing Qing" uniqKey="Sun Q">Qing-Qing Sun</name>
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</author>
<author><name sortKey="Nyberg, Tomas" uniqKey="Nyberg T">Tomas Nyberg</name>
<affiliation wicri:level="1"><inist:fA14 i1="02"><s1>Ångström Laboratory, Solid State Electronics, Uppsala University</s1>
<s2>Uppsala 751 21</s2>
<s3>SWE</s3>
<sZ>5 aut.</sZ>
<sZ>6 aut.</sZ>
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<country>Suède</country>
<wicri:noRegion>Uppsala 751 21</wicri:noRegion>
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</author>
<author><name sortKey="Zhang, Shi Li" uniqKey="Zhang S">Shi-Li Zhang</name>
<affiliation wicri:level="1"><inist:fA14 i1="02"><s1>Ångström Laboratory, Solid State Electronics, Uppsala University</s1>
<s2>Uppsala 751 21</s2>
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<country>Suède</country>
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</affiliation>
</author>
<author><name>WEI ZHANG</name>
<affiliation wicri:level="1"><inist:fA14 i1="01"><s1>State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University</s1>
<s2>Shanghai 200433</s2>
<s3>CHN</s3>
<sZ>1 aut.</sZ>
<sZ>2 aut.</sZ>
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<country>République populaire de Chine</country>
<wicri:noRegion>Shanghai 200433</wicri:noRegion>
</affiliation>
</author>
</titleStmt>
<publicationStmt><idno type="inist">13-0261432</idno>
<date when="2013">2013</date>
<idno type="stanalyst">PASCAL 13-0261432 INIST</idno>
<idno type="RBID">Pascal:13-0261432</idno>
<idno type="wicri:Area/Main/Corpus">000946</idno>
<idno type="wicri:Area/Main/Repository">000248</idno>
<idno type="wicri:Area/Chine/Extraction">000053</idno>
</publicationStmt>
<seriesStmt><idno type="ISSN">0741-3106</idno>
<title level="j" type="abbreviated">IEEE electron device lett.</title>
<title level="j" type="main">IEEE electron device letters</title>
</seriesStmt>
</fileDesc>
<profileDesc><textClass><keywords scheme="KwdEn" xml:lang="en"><term>Alumina</term>
<term>Amorphous material</term>
<term>Electron mobility</term>
<term>Gallium oxide</term>
<term>High performance</term>
<term>Indium oxide</term>
<term>Integrated circuit</term>
<term>Multiple layer</term>
<term>Nanocrystal</term>
<term>Non volatile memory</term>
<term>Room temperature</term>
<term>Self assembly</term>
<term>Thin film transistor</term>
<term>Transistor gate</term>
<term>Voltage threshold</term>
<term>Zinc</term>
<term>Zinc oxide</term>
</keywords>
<keywords scheme="Pascal" xml:lang="fr"><term>Transistor couche mince</term>
<term>Autoassemblage</term>
<term>Matériau amorphe</term>
<term>Grille transistor</term>
<term>Seuil tension</term>
<term>Mobilité électron</term>
<term>Température ambiante</term>
<term>Haute performance</term>
<term>Mémoire non volatile</term>
<term>Zinc</term>
<term>Nanocristal</term>
<term>Oxyde d'indium</term>
<term>Oxyde de gallium</term>
<term>Oxyde de zinc</term>
<term>Alumine</term>
<term>Multicouche</term>
<term>Circuit intégré</term>
<term>8107B</term>
<term>Al2O3</term>
</keywords>
<keywords scheme="Wicri" type="concept" xml:lang="fr"><term>Matériau amorphe</term>
<term>Zinc</term>
</keywords>
</textClass>
</profileDesc>
</teiHeader>
<front><div type="abstract" xml:lang="en">Semiconducting amorphous indium-gallium-zinc oxide (a-IGZO) films are integrated with an Al<sub>2</sub>
O<sub>3</sub>
/Pt-nanocrystals/Al<sub>2</sub>
O<sub>3</sub>
 gate-stack to form UV-erasable thin-film transistor (TFT) memory. The threshold voltage (V<sub>th</sub>
), subthreshold swing, I<sub>ON</sub>
/I<sub>OFF</sub>
 ratio, and effective electron mobility of the fabricated devices are 2.1 V, 0.39 V/decade, ∼10<sup>6</sup>
, and 8.4 cm<sup>2</sup>
/V.s, respectively. A positive V<sub>th</sub>
 shift of 2.25 V is achieved after 1-ms programming at 10 V, whereas a negative V<sub>th</sub>
 shift as large as 3.48 V is attained after 5-s UV erasing. In addition, a 10-year memory window of 2.56 V is extrapolated at room temperature. This high-performance a-IGZO TFT memory is suitable for optical touch-panel applications.</div>
</front>
</TEI>
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<fA05><s2>34</s2>
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<fA06><s2>8</s2>
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<fA08 i1="01" i2="1" l="ENG"><s1>Unique UV-Erasable In-Ga-Zn-O TFT Memory With Self-Assembled Pt Nanocrystals</s1>
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<fA11 i1="01" i2="1"><s1>CUI (Xing-Mei)</s1>
</fA11>
<fA11 i1="02" i2="1"><s1>SUN CHEN</s1>
</fA11>
<fA11 i1="03" i2="1"><s1>DING (Shi-Jin)</s1>
</fA11>
<fA11 i1="04" i2="1"><s1>SUN (Qing-Qing)</s1>
</fA11>
<fA11 i1="05" i2="1"><s1>NYBERG (Tomas)</s1>
</fA11>
<fA11 i1="06" i2="1"><s1>ZHANG (Shi-Li)</s1>
</fA11>
<fA11 i1="07" i2="1"><s1>WEI ZHANG</s1>
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<fA14 i1="01"><s1>State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University</s1>
<s2>Shanghai 200433</s2>
<s3>CHN</s3>
<sZ>1 aut.</sZ>
<sZ>2 aut.</sZ>
<sZ>3 aut.</sZ>
<sZ>4 aut.</sZ>
<sZ>7 aut.</sZ>
</fA14>
<fA14 i1="02"><s1>Ångström Laboratory, Solid State Electronics, Uppsala University</s1>
<s2>Uppsala 751 21</s2>
<s3>SWE</s3>
<sZ>5 aut.</sZ>
<sZ>6 aut.</sZ>
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<fA20><s1>1011-1013</s1>
</fA20>
<fA21><s1>2013</s1>
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<fA43 i1="01"><s1>INIST</s1>
<s2>222V</s2>
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<fA44><s0>0000</s0>
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<fC01 i1="01" l="ENG"><s0>Semiconducting amorphous indium-gallium-zinc oxide (a-IGZO) films are integrated with an Al<sub>2</sub>
O<sub>3</sub>
/Pt-nanocrystals/Al<sub>2</sub>
O<sub>3</sub>
 gate-stack to form UV-erasable thin-film transistor (TFT) memory. The threshold voltage (V<sub>th</sub>
), subthreshold swing, I<sub>ON</sub>
/I<sub>OFF</sub>
 ratio, and effective electron mobility of the fabricated devices are 2.1 V, 0.39 V/decade, ∼10<sup>6</sup>
, and 8.4 cm<sup>2</sup>
/V.s, respectively. A positive V<sub>th</sub>
 shift of 2.25 V is achieved after 1-ms programming at 10 V, whereas a negative V<sub>th</sub>
 shift as large as 3.48 V is attained after 5-s UV erasing. In addition, a 10-year memory window of 2.56 V is extrapolated at room temperature. This high-performance a-IGZO TFT memory is suitable for optical touch-panel applications.</s0>
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<fC02 i1="01" i2="X"><s0>001D03F04</s0>
</fC02>
<fC02 i1="02" i2="X"><s0>001D03F06B</s0>
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<fC02 i1="03" i2="3"><s0>001B80A07B</s0>
</fC02>
<fC02 i1="04" i2="X"><s0>001D03F06A</s0>
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<fC03 i1="01" i2="X" l="FRE"><s0>Transistor couche mince</s0>
<s5>01</s5>
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<s5>01</s5>
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<s5>02</s5>
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<s5>02</s5>
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<fC03 i1="02" i2="X" l="SPA"><s0>Autoensamble</s0>
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<s5>03</s5>
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<s5>03</s5>
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<s5>03</s5>
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<s5>04</s5>
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<s5>04</s5>
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<s5>04</s5>
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<s5>05</s5>
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<s5>05</s5>
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<s5>06</s5>
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<s5>06</s5>
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<s5>07</s5>
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<s5>07</s5>
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<s5>07</s5>
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<fC03 i1="08" i2="X" l="FRE"><s0>Haute performance</s0>
<s5>08</s5>
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<s5>08</s5>
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<s5>08</s5>
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<s5>09</s5>
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<s5>09</s5>
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<s5>09</s5>
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<s2>NC</s2>
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<s2>NC</s2>
<s5>22</s5>
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<s2>NC</s2>
<s5>22</s5>
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<fC03 i1="11" i2="X" l="FRE"><s0>Nanocristal</s0>
<s5>23</s5>
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<s5>23</s5>
</fC03>
<fC03 i1="11" i2="X" l="SPA"><s0>Nanocristal</s0>
<s5>23</s5>
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<fC03 i1="12" i2="X" l="FRE"><s0>Oxyde d'indium</s0>
<s5>24</s5>
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<s5>24</s5>
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<s5>24</s5>
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<fC03 i1="13" i2="X" l="FRE"><s0>Oxyde de gallium</s0>
<s5>25</s5>
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<s5>25</s5>
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<fC03 i1="13" i2="X" l="SPA"><s0>Galio óxido</s0>
<s5>25</s5>
</fC03>
<fC03 i1="14" i2="X" l="FRE"><s0>Oxyde de zinc</s0>
<s5>26</s5>
</fC03>
<fC03 i1="14" i2="X" l="ENG"><s0>Zinc oxide</s0>
<s5>26</s5>
</fC03>
<fC03 i1="14" i2="X" l="SPA"><s0>Zinc óxido</s0>
<s5>26</s5>
</fC03>
<fC03 i1="15" i2="X" l="FRE"><s0>Alumine</s0>
<s2>NK</s2>
<s5>27</s5>
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<s2>NK</s2>
<s5>27</s5>
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<s2>NK</s2>
<s5>27</s5>
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<s5>28</s5>
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<s5>28</s5>
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<s5>28</s5>
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<s5>46</s5>
</fC03>
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<s5>46</s5>
</fC03>
<fC03 i1="17" i2="X" l="SPA"><s0>Circuito integrado</s0>
<s5>46</s5>
</fC03>
<fC03 i1="18" i2="X" l="FRE"><s0>8107B</s0>
<s4>INC</s4>
<s5>56</s5>
</fC03>
<fC03 i1="19" i2="X" l="FRE"><s0>Al2O3</s0>
<s4>INC</s4>
<s5>82</s5>
</fC03>
<fC07 i1="01" i2="X" l="FRE"><s0>Composé III-VI</s0>
<s5>10</s5>
</fC07>
<fC07 i1="01" i2="X" l="ENG"><s0>III-VI compound</s0>
<s5>10</s5>
</fC07>
<fC07 i1="01" i2="X" l="SPA"><s0>Compuesto III-VI</s0>
<s5>10</s5>
</fC07>
<fN21><s1>252</s1>
</fN21>
<fN44 i1="01"><s1>OTO</s1>
</fN44>
<fN82><s1>OTO</s1>
</fN82>
</pA>
</standard>
</inist>
</record>

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Unique UV-Erasable In-Ga-Zn-O TFT Memory With Self-Assembled Pt Nanocrystals

Unique UV-Erasable In-Ga-Zn-O TFT Memory With Self-Assembled Pt Nanocrystals

Descripteurs français

English descriptors

Abstract

Links toward previous steps (curation, corpus...)

Links to Exploration step

Le document en format XML

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